Empirical throughput characterization

Fine-tuning throughput on Strix Halo

Measured training tokens/sec for LoRA and full-SFT on the AMD Ryzen AI Max+ 395 “Strix Halo” iGPU (Radeon 8060S, gfx1151, 124 GB unified memory) under ROCm. Four model arms, five research questions — every number on this site is derived from the raw run log, not hand-typed.

The headline hypothesis — 3–5× from the AOTriton attention kernel — held nowhere. Where SDPA applies it is a modest lever that shrinks with model size and even reverses for full-SFT; for the MoE arm it isn’t available at all. On Strix Halo, attention is not the dominant throughput knob — sequence length and (avoiding) larger batches matter more.

Findings at a glance

Five research questions, each on its own page with the charts and the raw numbers behind it.

The four arms

Chosen to span method (LoRA vs full-SFT), dense vs MoE, and a deliberate bf16/NaN probe.

Qwen3-4B

LoRA · 4B dense — the fast baseline

Qwen3-8B

LoRA · 8B dense — size scaling

GPT-OSS-20B

LoRA · 21B MoE (~3.6B active) — MXFP4 bring-up

Gemma-3-12B

full SFT · 12B dense — the bf16/NaN probe

Curious how a run is measured, or want to reproduce it? See Methods & reproducibility.